nEPT: Expose EPT & VPID capablities to L1 VMM
authorZhang Xiantao <xiantao.zhang@intel.com>
Tue, 15 Jan 2013 10:33:41 +0000 (11:33 +0100)
committerZhang Xiantao <xiantao.zhang@intel.com>
Tue, 15 Jan 2013 10:33:41 +0000 (11:33 +0100)
commitaa1b9dfdff9cb97c96d5b976457253ab92745bd1
tree60ea1aa691a849028eb05b936714591094a4933e
parent9ccf55307868063800606499b098ba5ecf8f72cb
nEPT: Expose EPT & VPID capablities to L1 VMM

Expose EPT's  and VPID 's basic features to L1 VMM.
For EPT, no EPT A/D bit feature supported.
For VPID, exposes all features to L1 VMM

Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Acked-by: Tim Deegan <tim@xen.org>
Acked-by: Jun Nakajima <jun.nakajima@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/vmx/vvmx.c
xen/arch/x86/mm/hap/nested_ept.c
xen/include/asm-x86/hvm/vmx/vvmx.h